Xinhua Lai (赖心华)

Xinhua Lai (赖心华)

I focus on AI + EDA research, including AI for EDA, chip placement/routing, and design space exploration and optimization. I have hands-on experience with large-model applications in physical design, multimodal fusion, and generative closed-loop frameworks, and strong end-to-end capability from research innovation to model/system engineering (Huawei C++ R&D; core contributor to the open-source AiEDA project).

📖 Education

  • 2021.09 - Present, University of Chinese Academy of Sciences (UCAS), Computer Applied Technology (081203), Ph.D. candidate (Research: AI for EDA, chip placement/routing; Advisor: Jungang Xu (徐俊刚))
  • 2016.09 - 2019.06, Central South University, Software Engineering (085405), M.Eng. (Research: deep learning applications; Advisor: Xuegong Chen)
  • 2010.09 - 2014.07, Jingdezhen Ceramic University, Electronic Science and Technology (080702), B.Eng.

🔥 News

  • 2026.03: 🎉 One paper is accepted by DAC 2026!
  • 2026.02: 🎉 One paper is accepted by TCAD 2026!
  • 2025.05: 🎉 One paper is accepted by TODAES 2025!
  • 2025.01: 🎉 1k GitHub stars⭐—thanks! Feel free to star and fork!

📝 Publications

Papers

Patents

  • 发明专利 CN202510301467.8 芯片设计指标生成模型训练方法及装置. 徐俊刚, 赖心华
  • 发明专利 CN202411422151.6 芯片布局方法及装置. 徐俊刚, 赖心华
  • 发明专利 CN202411421642.9 芯片布局信息生成方法及装置. 徐俊刚, 赖心华
  • 发明专利 CN202210361622.1 简历解析方法及装置. 王玲, 赖心华

💻 Experience

  • 2024.05 - 2025.12.31, Algorithm Engineer, Peng Cheng Laboratory
  • 2025.05.01 - 2025.06.16, Adjunct Lecturer (School of Artificial Intelligence), Lijiang Culture and Tourism College
  • 2021.09.01 - 2025.12.31, Teaching Assistant, University of Chinese Academy of Sciences (UCAS)
  • 2020.08 - 2021.08, Research Assistant, UCAS CCIP Lab
  • 2019.06 - 2020.07, Algorithm Engineer, Huawei Technologies Co., Ltd.

🤖 Projects

  • 2025.11 - Present, Multimodal LLM framework for chip PPA prediction and optimization (ISEDA 2026)
  • 2024.11 - Present, Pretrained foundation model for chip routing generation and evaluation (DAC 2026)
  • 2024.10 - 2025.03, Core module development for the open-source AiEDA platform
  • 2024.05 - 2024.12, Parallel macro placement with reinforcement learning and Transformers
  • 2023.11 - 2025.05, Transfer learning and parallel optimization for placement parameter autotuning (TODAES 2025)

🎖 Honors and Awards

  • openDACS 2025 Rising Star Award in Open-Source EDA & Chips (2025)
  • openDACS 2025 Excellence Award in Open-Source EDA & Chips Challenge (2025)
  • Best Poster, UCAS “Scientific Intelligence” Graduate Academic Forum (2025)
  • 3rd Place, Xiakedao $EDA^2$ Mixed-Size Placement Competition (2025.07)
  • UCAS Graduate Academic Scholarship (3 times) (2021-2023)
  • UCAS Merit Student (2021)

⌨️ Skills

  • Programming: Python, C++, Java; familiar with common design patterns (Singleton, Factory, Observer)
  • Deep Learning: PyTorch (research prototyping, training, and deployment); solid foundation in ML/DL
  • Tooling: Linux, Vim/Neovim, CMake; proficient with debugging and version control

💬 Others