💻 Experience

• 2024.05 - 2025.12.31, Algorithm Engineer, Peng Cheng Laboratory
• 2025.05.01 - 2025.06.16, Adjunct Lecturer (School of Artificial Intelligence), Lijiang Culture and Tourism College
• 2021.09.01 - 2025.12.31, Teaching Assistant, University of Chinese Academy of Sciences (UCAS)
• 2020.08 - 2021.08, Research Assistant, UCAS CCIP Lab
• 2019.06 - 2020.07, Algorithm Engineer, Huawei Technologies Co., Ltd.

🤖 Projects

• 2025.11 - Present, Multimodal LLM framework for chip PPA prediction and optimization (ISEDA 2026)
• 2024.11 - Present, Pretrained foundation model for chip routing generation and evaluation (DAC 2026)
• 2024.10 - 2025.03, Core module development for the open-source AiEDA platform
• 2024.05 - 2024.12, Parallel macro placement with reinforcement learning and Transformers
• 2023.11 - 2025.05, Transfer learning and parallel optimization for placement parameter autotuning (TODAES 2025)